Design and Analysis of Low Power VLSI Full Adders and 32-bit Adders
Author(s)
Dr. Md. Masood Ahmad and Dr. D. Anitha
GITAM University, Hyderabad Campus, India.
ISBN 978-93-5547-849-8 (Print)
ISBN 978-93-5547-850-4 (eBook)
DOI: 10.9734/bpi/mono/978-93-5547-849-8
Low power design of VLSI circuits is the key to design of circuits for protable products. The power consumption is depending on staiatic power and dynamic power. The dynamic power is power consumed during the circuit in action. The static power is power consumed when circuit is not in action. The static power consumption is going to be more than the dynamic power, hence we need to understand the static power consumption in detail. We need to come with the techniques to mitigate the static power consumption. In this book we are looking at how to reduce the leakage current in the MOSFET. Leakage current is the major contributor for the static power consumption of the MOSFET device. In this book we are looking at different full adders available and proposing different full adders which can offer low leakage current. The leakage currents of the all the existing fulladders are compared with the proposed full adders. The 32- bit adders are designed using exsiting full addders and the proposed fulladders. The static power consumption in all the 32-bit adders is compared and presented.
