Anushkannan, N. K., and H. Mangalam. “Phase Frequency Detector (PFD) Design With Frequency Dividers for a Phase Locked Loop (PLL) in 0.18-µm CMOS Technology”. Technological Innovation in Engineering Research Vol. 3 (June 1, 2022): 28–43. Accessed June 4, 2026. https://stm.bookpi.org/TIER-V3/article/view/7058.