Science and Technology: Developments and Applications Vol. 5

Abstract

The Large Fan-In and high-performance gates are essential to make portable electronic devices. The efficient realization of high Fan-in XOR gate defines the performance of digital circuits like adders, magnitude comparators etc. In this paper, an efficient realization of three input two-level XOR(Exclusive-OR) is presented. The design of low power and high-speed proposed XOR gate involves the combination of pass and transmission gates. The main objective to achieve this is based on the selection of input signals to propagate and maintain the good logic swing. The exclusive OR gate is a fundamental building primitive for adders which are mostly used in almost all the arithmetic circuits. Two methods were used to design the proposed XOR, one (i.e. Pass_gate) is purely based on pass transistors with 8 MOSFET and the second method (Modified_Pass_gate) uses transmission gates with 12 transistors. The Modified_Pass_gate offers 86.14% and 6.66% power dissipation reduction compared to static and Pass_gate XOR respectively and 77.18% and 50.94% less propagation delay compared to static and Pass_gate XOR respectively, at the supply voltage of 0.7v with input signal frequency of 3GHz. The simulation is performed based on a 32 nm technology node (PTM-models) using the Hspice Synopsis simulation tool. From the simulation, it is evident that a definite advantage is in favor of the proposed XOR gate designs. Especially, for the combination, at 0.7v and at 3GHz, the average power