1.
Leela Bitla, V. Saraswathi and Rupali Vairagade. Recent Analysis of NAND Gate Based Phase Frequency Detector for Phase Locked Loop (PLL). RADER-V1 [Internet]. 2023 Mar. 29 [cited 2026 Jun. 14];:94-101. Available from: https://stm.bookpi.org/RADER-V1/article/view/10093