M. Ramana REDDY. The Design of a Static CMOS 16 Bit High Speed and Low Power Consumption Hybrid Adder Circuit Using Brent Kung Adder: A Recent Study . New Approaches in Engineering Research Vol. 8, [S. l.], p. 101–122, 2021. DOI: 10.9734/bpi/naer/v8/9295D. Disponível em: https://stm.bookpi.org/NAER-V8/article/view/2273. Acesso em: 4 jun. 2026.