Veena Sanath KUMAR; ABHISHEK L S; CHANDU H M; CHIRAG A; ROHAN S. Design of Low Power Configurable Multiclock Digital System from RTL to GDSII. Innovative Solutions: A Systematic Approach Towards Sustainable Future, Edition 1, [S. l.], p. 171–180, 2025. DOI: 10.9734/bpi/mono/978-93-49238-47-3/CH18. Disponível em: https://stm.bookpi.org/ISASATWF/article/view/17224. Acesso em: 28 jul. 2026.