1.
G. Prasanna Kumar, J. Prabhakar and Nagulancha Raju. Frequency Multiplier with Delay Locked Loop -Based Clock Generator for System on Chip Applications. AAER-V4 [Internet]. 2021 Apr. 9 [cited 2026 Jun. 13];:123-31. Available from: https://stm.bookpi.org/AAER-V4/article/view/644